I am looking to select a stepper motor driver that can be driven from the IDC pins of an FPGA board. In our application we are aiming to have a low latency feedback loop thats on the order of microseconds. From what I understand, pololu offers L/C stepper motor drivers that offer response times that meet our requirements (e.g. the A4988 driver manual, page 6 shows response times to the MS1,MS2, and MS3 ports on the order of 200 ns and a step high voltage minimum time of 1 us), but to get maximum performance and speed from my stepper motor, a chopper (tic) stepper motor driver should be used. I have read through the tic stepper motor driver user manual, but am unclear on if it can be used simply via an analog signal from the pins without a communication protocol (which would exceed our timing requirements) like the A4988 can. Any help is appreciated.
My apologies for posting this twice, I mistakenly posted in the general electronics support forum instead of the motor controllers/drivers and motors board.
It sounds like you might be implying that only our Tic stepper motor controllers have current limiting. Please note that all of our dedicated stepper motor drivers (including our A4988 carriers) feature current limiting.
The Tic controllers offer several additional interface options not available on our drivers, but if you want a response that fast, you should probably generate your STEP and DIR signals with the FPGA and use one of our dedicated stepper motor drivers or a Tic controller in STEP/DIR mode.
Thank you for your response! I am new to stepper motor control and am still learning, and have found your information and products extremely helpful. As a follow up question to driving the stepper motor drivers, I have not found the IO standard of the drivers I am interested in (STSPIN220 Low-Voltage Stepper Motor Driver Carrier and STSPIN820 Stepper Motor Driver Carrier). It is stated that both drivers can interface with both 3.3V and 5 V logic, but I could not find which protocol(s) they can interface with. My FPGA uses LVCMOS33- is this compatible with the stepper motor drivers mentioned above, and how can you tell?
I am not familiar with the specific FPGA you mentioned, but as long as it can toggle a digital output pin high and low, you should be able to use it to control the stepper motor drivers you mentioned.
The STSPIN220 Low-Voltage Stepper Motor Driver Carrier and STSPIN820 Stepper Motor Driver Carrier use the same low-level STEP/DIR interface as most of our other stepper motor drivers. Each time the STEP pin switches from low to high, it will advance the motor one step (or microstep) in the direction specified by the signal on the DIR pin.
So, the rate that you pulse the STEP pin (along with the microstepping mode) determines the speed of the stepper motor, and the number of times you pulse the STEP pin determines how far the motor turns, while the DIR pins simply specifies the direction.
Thank you for your response- my apologies, I’m not sure I articulated my question clearly, so I’ll rephrase: the point I am getting stuck is the protocol/voltage levels which are considered 1 and 0 on the stepper motor driver. I wish to control the driver board via the analogue I/O pins on the FPGA and am able to control the voltage on these pins as I wish, with the FPGA pins outputting “1” (a voltage above 2.4 V) and “0” (a voltage below 0.8V). My question arises because I’m not sure what levels the stepper motor driver board defines as “1” and “0” respectively- I want to make sure the definition of the logic levels match to avoid undesired performance. Thank you for your assistance
It sounds like you are talking about the thresholds that determines what voltage the driver will consider high or low. This is referred to in their datasheets as the “High logic level input voltage” (or VIH) and “Low logic level input voltage” (or VIL), respectively. For the STSPIN220, VIH is 1.6V and VIL is 0.6V. For the STSPIN820 VIH is 2V and VIL is 0.8V. You can find the datasheets for the drivers under the “Resources” tab of their respective product pages.
By the way, is there a particular reason you are using analog signals instead of digital?
That is exactly what I’m talking about, thank you for your help in finding that information. My apologies for it being a beginner question/in the documentation, I was searching for it with a different name.
I’m not sure I understand what you’re asking- thank you for asking clarifying/refining questions. I am driving the extension pins of the FPGA board (the pins are male IDC 0.1") using the LVCMOS definition of high and low, so I’m interpreting them as digital signals that are sent to the stepper motor driver board. I just wanted to make sure the definitions of high and low matched accordingly so the two could communicate. Are you suggesting that is not a proper mode of operation? Thanks for your help
In your last post, you mentioned that you wanted to control the driver from analog I/O pins on your FPGA, so I was mostly just curious why, but now it sounds like you are talking about using digital signals. A digital signal like an LVCMOS output is good for controlling the drivers as long as, like you mentioned, their logic high and logic low voltages are compatible.