The pololu web page for the DRV8834 carrier (and some posts in this forum) says “M0 is floating by default”. I think this is a mistake, since the data sheet for the DRV8834 (SLVSB19D – FEBRUARY 2012 – REVISED MARCH 2015) on page 4 says “Internal pulldown.” In other words, if you don’t connect M0 and M1, the chip has micro stepping mode of “full.”
I could be wrong, maybe TI’s data sheet is wrong. Now that I think about it, the data sheet also says M0 is tri-state. So if it were internally pulled down, it would be impossible to put it in a floating state? Thus the TI data sheet must be in error, and should not say that it has an internal pulldown.