I did expect delays to be necessary but without them it works. In my application I show every value for at east 1 second so I don’t think there is an issue. I literally followed the text in the display datasheet. Here is how I did it.
[code]RS_HIGH; // First RS is brought to logic high
CE_LOW; // and then CE is brought to logic low
// ******************************* Load control word0 01001111
CLK_LOW; // Low again
DATA_LOW; // 0 Controlword 0, next each successive rising CLK edge will shift the data at the DIN pin
CLK_HIGH; // Next rising CLK edge
CLK_LOW; // Low again
DATA_HIGH; // 1 normal operation, next each successive rising CLK edge will shift the data at the DIN pin
CLK_HIGH; // Next rising CLK edge
CLK_LOW; // Low again
DATA_LOW; // 0 brightness, next each successive rising CLK edge will shift the data at the DIN pin
CLK_HIGH; // Next rising CLK edge
CLK_LOW; // Low again
DATA_LOW; // 0 brightness, next each successive rising CLK edge will shift the data at the DIN pin
CLK_HIGH; // Next rising CLK edge
CLK_LOW; // Low again
DATA_HIGH; // 1 pwm, next each successive rising CLK edge will shift the data at the DIN pin
CLK_HIGH; // Next rising CLK edge
CLK_LOW; // Low again
DATA_HIGH; // 1 pwm, next each successive rising CLK edge will shift the data at the DIN pin
CLK_HIGH; // Next rising CLK edge
CLK_LOW; // Low again
DATA_HIGH; // 1 pwm, next each successive rising CLK edge will shift the data at the DIN pin
CLK_HIGH; // Next rising CLK edge
CLK_LOW; // Low again
DATA_HIGH; // 1 pwm, next each successive rising CLK edge will shift the data at the DIN pin
CLK_HIGH; // Next rising CLK edge
CE_HIGH; // when 8 bits have been loaded the CE line is brought to high
CLK_LOW; // when CLK goes to logic low, new dat is copied
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